Version 2.1 has been developed to quicken the design of Lattice FPGA-based applications for a broad range of markets.
The new version of Radiant supports the full SystemVerilog design flow, from the native synthesis tool through the schematic viewer, hierarchical viewer, configuration wizards, and debugging tool. This coding method eases on-chip debugging and other tasks, streamlining the whole design process to get Lattice FPGA-based products to the market quicker. The new version of Radiant has been designed to be easier to use with the tool’s drag-and-drop GUI being redesigned, and support added for an I/O planner to enforce correct pin placement for each I/O signal or bus.
Lattice Radiant provides best-in-class file size and download times in comparison to software design tools from competing vendors. The Radiant software is 20x smaller in file size and 10x faster to install than competition, allowing users to quickly download the tool and start designing.
“Many FPGA designers are moving to design solutions that leverage SystemVerilog as it gives them more coding efficiency and granular control over their application at every step in the design flow,” said Roger Do, Senior Product Line Manager, Lattice Semiconductor. “When used to develop embedded systems based on our latest low power, small form factor FPGA architecture, the Lattice Radiant design tool enables developers to quickly add low power processing and connectivity to applications that operate within the network.”
In addition to the Certus-NX family, Lattice Radiant also supports the CrossLink-NX FPGAs for embedded and smart visions applications, as well as the ultra-low power, small form factor Lattice iCE40 UltraPlus FPGAs.