In a modern multi-processing environment, a system may comprise of many disparate processors, each focusing on a particular processing task. Multi-processor JTAG works by chaining the devices’ debug interfaces together. Often these have incompatible debug interfaces, for example they may have different voltage requirements. With modern processors capable of entering very low power modes, the debug interface of any processor may be powered down at any time and this breaks the chain and prevents debugging of any device attached to it. The JTAG Switcher is designed to overcome all of these issues. It can work with cores that use different voltages and can seamlessly adapt to changing chain lengths as cores go into and out of low power states.
Potential applications include the ability for developers to test combinations of multi-processors on a board as individual devices can be switched in and out of the JTAG chain on-the-fly. Several targets could be connected to a single debugger for regression tests. The VHDL switcher code could also be included into silicon designs where similar problems can occur within a chip. A standalone unit could be developed that allows the JTAG interfaces of multiple boards to be brought together under the control of a single debugger.
The VHDL source code for the JTAG Switcher is Open Source and freely available and includes pre-built examples for some Altera and Lattice FPGAs. The system can be configured once at startup and left to run, or can be dynamically configured at runtime to include or exclude various processors from the overall system.
Lauterbach - www.lauterbach.com