Complete C/C++ compiler and debugger toolchain for RISC-V

May 22, 2019 //By Ally Winning
IAR Systems has launched the company’s IAR Embedded Workbench C/C++ compiler and debugger toolchain with support for RISC-V cores.
IAR Systems has launched the company’s IAR Embedded Workbench C/C++ compiler and debugger toolchain with support for RISC-V cores.

The first version of the IAR C/C++ Compiler for RISC-V delivers improvements in code density, generating code that is smaller than code generated by other available tools. The toolchain’s C-STAT integrated static code analysis provides higher code quality. C-STAT can also help with compliance for standards like MISRA C:2004, MISRA C++:2008 and MISRA C:2012, as well as to detect defects, bugs, and security vulnerabilities as defined by the Common Weakness Enumeration (CWE) and a subset of CERT C/C++.

The IAR Embedded Workbench C-SPY Debugger gives full control of the application in real time, and its simulator provides full debugging capabilities even without access to the hardware. For in-circuit debugging, IAR Systems’ I-jet delivers a high-speed debugging platform with full code control.

The first version of IAR Embedded Workbench for RISC-V provides support for RV32 32-bit RISC-V cores and extensions. Future releases will include 64-bit support and support for the smaller RV32E base instruction set, as well as functional safety certification and security solutions.

More information

www.iar.com/riscv

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