Cadence digital full flow suite optimized for new Cortex CPUs

May 27, 2020 //By Ally Winning
Cadence has launched a digital full flow Rapid Adoption Kit (RAK) to optimize power, performance, and area (PPA) for Cortex-A78 and Cortex-X1 CPU-based designs.
Cadence has launched a digital full flow Rapid Adoption Kit (RAK) to optimize power, performance, and area (PPA) for Cortex-A78 and Cortex-X1 CPU-based designs.

The company has also optimized its Verification Suite and engines for the creation of Cortex-A78 and Cortex-X1 CPU-based designs.

Digital Full Flow RAK
Cadence has tuned the digital full flow RAK for optimal power and performance and the support of 7nm and 5nm foundry process nodes. The fully integrated Cadence RTL-to-GDS RAK intrgrates the Genus Synthesis Solution, Innovus Implementation System, Quantus Extraction Solution, Tempus Timing Signoff and ECO Solution, and the Voltus IC Power Integrity Solution. The optimized RAK includes:
• iSpatial technology to unify the Genus Synthesis Solution and Innovus Implementation System in order to provide better PPA and quicker design closure
• RTL-to-signoff activity vector-driven power optimization to achieve lower power
• Simultaneous power-integrity and timing signoff closure through Cadence’s data model which integrates implementation, timing signoff and IR drop signoff engines.

Verification Suite and Engines
Cadence Verification Suite and its engines have also been tuned for Arm Cortex-A78 and Cortex-X1 CPU-based designs and to assist verification throughput. The Cortex-A78 and Cortex-X1 CPU-optimized suite features the Cadence Xcelium Logic Simulation Platform, Palladium Z1 Enterprise Emulation Platform, JasperGold Formal Verification Platform and vManager Planning and Metrics and Cadence Arm AMBA VIP, including ACE and CHI-D CIP and the Perspec System Verifier Arm library.

“Through our continued collaboration with Cadence, we’re enabling our customers to achieve more performance, efficiency, scalability, and ultimately, mobile product differentiation,” said Paul Williamson, vice president and general manager, Client Line of Business, Arm. “The Cadence digital full flow RAK and Verification Suite and engines provide customers with the foundation they need to develop next-generation mobile products with our Cortex-A78 and Cortex-X1 CPUs.”

“Over the course of the past year, we’ve worked closely with Arm to ensure that our digital full flow RAK and Verification Suite and engines are optimized for the Cortex-A78 and Cortex-X1 CPUs,” said Nimish Modi, senior vice president, marketing and business development at Cadence. “Customers are consistently under pressure to deliver innovative


Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.