Low-cost FPGA development kits for Altera Cyclone chips

October 16, 2013 // By Graham Prophet
Altera has added to its low-cost device offering with development kits priced from $49, providing a common development environment with its existing range.

The company has added five low-cost development kits based on its Cyclone V FPGAs, and using the Quartus II development environment. These new development kits include:

• The Arrow BeMicro CV is a $49 development kit that features a Cyclone V E FPGA. This low-cost development kit allows developers to get started with their Cyclone V FPGA project within minutes.

• The TerASIC Cyclone V GX Starter Kit is a $179 kit includes both a high-speed mezzanine connector (HSMC) and an Arduino connector, allowing you to quickly start building low-power video systems, including automotive driver assistance and human machine interfaces.

• The Altima Cyclone V GX Development Kit is a $349 kit that offers a quick and simple approach to develop low-cost and low-power, FPGA-based system-level designs.

• EBV Elektronik GmbH offers a Cyclone V GX Development Board for €749 that includes a number of design examples that allows customers to quickly develop projects that require high-speed serial transceivers.

• EBV Elektronik GmbH also offers a Mercury Code Cyclone V GX Development Board for €599 that allows customers to rapidly develop FPGA-based systems used in industrial automation and communications applications.

Altera’s current low-cost portfolio of CPLDs, FPGAs and SoCs include the Max V CPLD, the Cyclone IV and Cyclone V FPGA and the Cyclone V SoC which hosts an integrated ARM Cortex™-A9 MPCore processor system. The portfolio exploits intellectual property (IP), architecture and process technology that are optimised for low cost. The use of hardened functions, including hard PCI Express (PCIe) IP blocks and hard memory controllers, simplify system development and increase system performance. Cyclone V FPGAs and Cyclone V SoCs feature a hard memory controller with industry leading throughput, providing almost twice the effective memory bandwidth with lower toggle rate versus competitive 28 nm low-cost FPGA families.

The portfolio of low-cost CPLDs, FPGAs and SoCs uses a common development environment. This makes it easy for customers to migrate between