Interface-oriented FPGAs enable MIPI, video bridging

February 27, 2017 // By Graham Prophet
Lattice Semiconductor has added to the capabilities of its CrossLink programmable ASSP (pASSP) offering to expand video bridging scenarios with the release of three CrossLink intellectual property (IP) and two new CrossLink demonstration platforms showcasing MIPI DSI to LVDS and CMOS to MIPI CSI-2.

Lattice’s is pursuing its declared intent to provide bridging solutions for consumer, industrial, and automotive applications; the company has optimized existing CrossLink IP to save logic resources and lower power consumption.


The CrossLink product was designed to address the challenges of a rapidly changing I/O landscape by offering designers a new way to develop high performance, low power and compact bridging solutions. Lattice says it has seen strong interest from customers to expand beyond typical early applications of the CrossLink product for simple interface conversion, merging and muxing of image sensors, application processors and displays.


By optimizing existing IP, applying IP and development platforms, along with additional resources, Lattice believes it can offer more solutions for a greater variety of bridging applications that combines the flexibility and fast time to market of an FPGA and the power and functional optimization of an ASSP.


“The new CrossLink IP and solutions will enable our customers to adopt cameras and displays with the latest mobile interface technology to reduce overall system cost, power and size, while accelerating the design cycle of their next-generation products,” said C.H. Chee, senior director of marketing, mobile & consumer division at Lattice Semiconductor.


The IP appearing in this release include;

- a one-input-to-one-output MIPI CSI-2 camera interface bridge that enables better connectivity and improved signal integrity over connectors, large PCBs and flex cabling. It also provides programmability for data packet repair or additional packet transmissions.

- a one-input-to-two-output MIPI CSI-2 camera splitter bridge that enables video data from a single image sensor to go to two sources.

- a 4:1 MIPI CSI-2 camera aggregator bridge that allows four CSI-2 cameras to be connected to a single CSI-2 interface on the processor. Two image sensors are merged together in a left/right format. A GPIO pin can then multiplex between the two sets of merged image sensors.


The technology demonstration platforms comprise;

- a CMOS